China's AI compute: Supernodes take center stage at WAIC

At WAIC, Chinese vendors and compute value-chain players put supernode solutions at the center of their AI compute strategies. The competition is moving beyond standalone chip performance toward system-level coordination across chips, interconnects, memory access, software, and architecture. The key differentiator is increasingly commercial delivery, not the largest stated card count.

Written by
Mengying Tao
Published on
August 10, 2026
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What is a supernode?
A supernode is a computing system in which multiple physical compute nodes are tightly connected through high-efficiency interconnect protocols. It supports unified memory addressing across nodes and functions logically as a single computer.
Its three core technologies are unified memory access, ultra-low latency, and ultra-high bandwidth. At WAIC, vendors presented supernode solutions as AI compute competition shifts beyond standalone chip performance toward system-level coordination across chips, interconnects, software, and architecture.

The relevant measures are not directly comparable

The WAIC announcements use several different measures of scale. Some vendors report cards per rack; others cite cards in a system configuration or cluster; others point to delivered chip volumes. These numbers should not be collapsed into a single ranking.
Huawei reported 64 cards per rack for its Atlas 950 SuperPoD, a physical 1,024-card system shown at WAIC, and scalability to 8,192 cards. Sugon reported 640 cards per rack for its Sugon 8000 and showcased a 100,000-card cluster. Alibaba's Pangu AL128 was listed with 128 cards per rack, while more than 560,000 Zhenwu M890 chips have reportedly been delivered.
Other vendors emphasized system configuration or technical architecture. Biren Technology listed a 1,024-card scale-up configuration using near-package optics. TSINGMICRO cited a 4,096-card system and scalability to clusters with tens of thousands of cards. EVAS Intelligence listed 64–128 chips per system and scalability to hundreds of thousands of cards for its RISC-V-based solution.

Sinolytics Radar 244 WAIC AI compute

Interconnect architecture becomes a competitive field

The technical claims at WAIC show where differentiation is moving. Biren is using near-package optics. Moore Threads claims a single-layer scale-up network that reduces inter-card communication latency to the sub-microsecond level. TSINGMICRO claims interconnect costs 90% lower than overseas solutions. MetaX emphasizes a "zero-cabling" modular design aimed at small- and medium-scale customers.
These features address a central constraint in AI compute: the value of additional accelerators depends on whether memory, networking, and software can coordinate them efficiently. As demand for low-latency inference rises with agentic AI, system integration becomes more consequential than a standalone chip benchmark.

Commercial delivery remains the real dividing line

The WAIC landscape contains large scalability claims, but only a limited number of vendors have achieved scaled commercial deployment. Huawei, Sugon, and Kunlunxin seem to be among the leading vendors in this regard; many other solutions remain at prototype or small-scale validation stage.
That distinction matters. A large stated cluster size can indicate technical ambition, but it does not establish that a system has been delivered, deployed, and operated at scale. For companies assessing China's AI compute ecosystem, the relevant questions are therefore: Which systems are physically demonstrated? Which have commercial deployment? And which remain architecture or scale claims?

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